Simulation software may be used to verify or functionally test the design of an integrated circuit (IC) before the IC is manufactured. Although simulation software may verify proper operation of the IC design, defects may be introduced into the IC during the manufacturing process, which may cause some portion of the IC to operate differently than designed.
Various test functions are therefore built into many ICs, such as automatic test pattern generation (ATPG), which may help detect such defects. As the name implies, with ATPG, automatically generated test patterns are applied to inputs of various circuit paths of the IC. Defects may be detected by observing logic values at one or more outputs of the circuit while applying a given test pattern. If an IC is free of defects, the values observed at the outputs should match those expected for a given pattern. On the other hand, a defect is considered detected if the value at an output differs from what is expected for a given test pattern. ATPG allows a wide range of patterns to be applied in order to provide an adequate coverage of possible input sequences.
Access to certain test features such as ATPG may be restricted at times to avoid enabling ATPG after initial testing is complete, or for other reasons. Accordingly, in some cases, security signals may be used to control or restrict access to test features such as ATPG. A security signal that controls ATPG must itself be left off of the ATPG testing chain (meaning it is not driven directly by test patterns), or else it will toggle during the course of ATPG testing and disrupt the testing functionality.
However, it may not be sufficient to simply keep the security signal that controls enabling/disabling of ATPG testing off the testing chain. Security signals are typically read from non-volatile storage (e.g., fuses or some other non-volatile technology) and temporarily stored in a register (e.g., a “shadow” register) as the non-volatile memory may not be able to drive the signals directly. Other signals that control, for example, updating of these registers (e.g., a write enable signal) may be subject to modification during an ATPG scan in ways that are not possible during normal system operation. A design error similarly exists if these signals are not immune to modification during the testing procedures because such a modification may cause the security signal to toggle during ATPG testing, disrupting the test and causing it to terminate before completion.